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Description on control techniques of inverter ZVS

Mar 22, 2025

The loss of the device is divided into two parts, namely, ① on-state loss and ② switching loss. The on-state loss is the device on-state voltage drop × on-state current. As the MOS transistor on-state voltage drop is low and only 1-2V, the on-state loss is very small. The switching loss accounts for a large part of the equipment loss. Especially for high-frequency equipment, the higher the frequency is, the greater the proportion of switching loss is. So, the inverter control mode is of paramount importance. There are two methods for reduction of switching loss, i.e., ① frequency reduction, ② reduction of the voltage and current during turn-on and turn-off. The reduction of frequency is limited. It is prohibited to blindly reduce the frequency because the quenching depth must be guaranteed. Therefore, it is necessary to reduce the voltage and current during turn-on and turn-off. The equipment adopts ZVS inverter (zero voltage turn-off), that is, the turn-off operation is carried out when the voltage is zero. Because the voltage is close to zero, the product of voltage and current is small, further the switching loss is decreased accordingly.

The biggest advantage of the inverter board is ZVS zero voltage switching control, which can minimize the device switching loss. The excessive large lead angle of the resonance oscillation will result in excessive low power factor and high oscillation voltage. The excessive large output current (mainly reactive current) will cause damage to the MOS transistor and diode in serious case. However, excessive low output current, due to the proximity of the inductive region, will cause the MOS transistor to generatevoltage spike at the moment of turn-off. It is difficult to absorb the voltage spike simply by resistance. If the spike is too high, it will also damage the MOS transistor. So, it is sure to keep the trigger lead angle constant. The control circuit uses phase locking and demodulation technology, with specific block diagram shown below:

info-796-387

It can be seen from the diagram above that the inverter circuit detects the phase of voltage all the time to keep it consistent with the phase of trigger pulse so that the phases of voltage and current (the phase of trigger pulse is equal to the phase of current) are nearly in the overlapping status to achieve ZVS zero voltage switching.

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